433 search results - page 33 / 87 » Scale in Chip Interconnect requires Network Technology |
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
114
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ISCA
1993
IEEE
15 years 1 months ago
1993
IEEE
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
SLIP
2009
ACM
15 years 4 months ago
2009
ACM
Double patterning lithography seems to be a prominent choice for 32nm and 22nm technologies. Double patterning lithography techniques require additional masks for a single interco...
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
The advent of deep sub-micron technology has recently highlighted the criticality of the on-chip interconnects. As diminishing feature sizes have led to increases in global wiring...
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MICRO
2003
IEEE
15 years 2 months ago
2003
IEEE
As demand for bandwidth increases in systems-on-a-chip and chip multiprocessors, networks are fast replacing buses and dedicated wires as the pervasive interconnect fabric for on-...