469 search results - page 8 / 94 » Scheduler Modeling Based on the Controller Synthesis Paradig... |
DAC
1996
ACM
15 years 3 months ago
1996
ACM
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
ASPDAC
2006
ACM
15 years 5 months ago
2006
ACM
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
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TVLSI
2008
14 years 11 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
FPGA
1995
ACM
15 years 3 months ago
1995
ACM
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
ISSS
2002
IEEE
15 years 4 months ago
2002
IEEE
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...