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» Scheduling for Reduced CPU Energy
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SAC
2004
ACM
15 years 2 months ago
L0 buffer energy optimization through scheduling and exploration
Clustered L0 buffers are an interesting alternative to reduce energy consumption in the instruction memory hierarchy of embedded VLIW processors. Currently, the synthesis of L0 cl...
Murali Jayapala, Tom Vander Aa, Francisco Barat, G...
DAC
2004
ACM
15 years 10 months ago
Profile-based optimal intra-task voltage scheduling for hard real-time applications
This paper presents a set of comprehensive techniques for the intratask voltage scheduling problem to reduce energy consumption in hard real-time tasks of embedded systems. Based ...
Jaewon Seo, Taewhan Kim, Ki-Seok Chung
MM
2005
ACM
157views Multimedia» more  MM 2005»
15 years 3 months ago
Chameleon: application level power management with performance isolation
In this paper, we present Chameleon—an application-level power management approach for reducing energy consumption in mobile processors. Our approach exports the entire responsi...
Xiaotao Liu, Prashant J. Shenoy, Mark D. Corner
MICRO
2000
IEEE
122views Hardware» more  MICRO 2000»
15 years 1 months ago
Dynamic zero compression for cache energy reduction
Dynamic Zero Compression reduces the energy required for cache accesses by only writing and reading a single bit for every zero-valued byte. This energy-conscious compression is i...
Luis Villa, Michael Zhang, Krste Asanovic
88
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RTAS
2000
IEEE
15 years 1 months ago
Voltage-Clock-Scaling Adaptive Scheduling Techniques for Low Power in Hard Real-Time Systems
—Many embedded systems operate under severe power and energy constraints. Voltage clock scaling is one mechanism by which energy consumption may be reduced: It is based on the fa...
C. Mani Krishna, Yann-Hang Lee