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96
Voted
ISQED
2008
IEEE
119views Hardware» more  ISQED 2008»
15 years 7 months ago
Instruction Scheduling for Variation-Originated Variable Latencies
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay also has variat...
Toshinori Sato, Shingo Watanabe
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
15 years 7 months ago
SoC testing using LFSR reseeding, and scan-slice-based TAM optimization and test scheduling
Abstract— We present an SoC testing approach that integrates test data compression, TAM/test wrapper design, and test scheduling. An improved LFSR reseeding technique is used as ...
Zhanglei Wang, Krishnendu Chakrabarty, Seongmoon W...
68
Voted
IPPS
2007
IEEE
15 years 7 months ago
Scheduling Issues in Optimistic Parallelization
Irregular applications, which rely on pointer-based data structures, are often difficult to parallelize. The inputdependent nature of their execution means that traditional paral...
Milind Kulkarni, Keshav Pingali
104
Voted
VTC
2006
IEEE
15 years 6 months ago
Scheduling in Cellular CDMA-TDD Networks
Abstract— In this paper different scheduling algorithms applied to cellular CDMA (code division multiple access) systems with different duplexing modes are studied. In particular...
Ellina Foutekova, Patrick Agyapong, Birendra Ghimi...
102
Voted
IEEEPACT
2000
IEEE
15 years 5 months ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers