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IEEEPACT
2008
IEEE
15 years 4 months ago
A tuning framework for software-managed memory hierarchies
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
Manman Ren, Ji Young Park, Mike Houston, Alex Aike...
70
Voted
SC
2004
ACM
15 years 3 months ago
Analysis and Performance Results of a Molecular Modeling Application on Merrimac
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. D...
ACSAC
2010
IEEE
14 years 7 months ago
G-Free: defeating return-oriented programming through gadget-less binaries
Despite the numerous prevention and protection mechanisms that have been introduced into modern operating systems, the exploitation of memory corruption vulnerabilities still repr...
Kaan Onarlioglu, Leyla Bilge, Andrea Lanzi, Davide...
ASPLOS
1998
ACM
15 years 1 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
14 years 7 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar