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117
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FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
15 years 8 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
DAC
1996
ACM
15 years 8 months ago
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis
This paper proposes a state encoding method for asynchronous circuits based on the theory of regions. A region in a Transition System is a set of states that "behave uniforml...
Jordi Cortadella, Michael Kishinevsky, Alex Kondra...
139
Voted
DAC
2009
ACM
15 years 7 months ago
Reduction techniques for synchronous dataflow graphs
The Synchronous Dataflow (SDF) model of computation is popular for modelling the timing behaviour of real-time embedded hardware and software systems and applications. It is an es...
Marc Geilen
179
Voted
CCGRID
2004
IEEE
15 years 7 months ago
Capability matching of data streams with network services
Distributed computing middleware needs to support a wide range of resources, such as diverse software components, various hardware devices, and heterogeneous operating systems and...
Han Gao, Ivan R. Judson, Thomas D. Uram, Terry Dis...
CHES
2006
Springer
125views Cryptology» more  CHES 2006»
15 years 7 months ago
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbr...
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