605 search results - page 41 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
ACSAC
2009
IEEE
15 years 4 months ago
2009
IEEE
—MapReduce has become increasingly popular as a powerful parallel data processing model. To deploy MapReduce as a data processing service over open systems such as service orient...
HPCA
2001
IEEE
15 years 10 months ago
2001
IEEE
We propose methods for reducing the energy consumed by snoop requests in snoopy bus-based symmetric multiprocessor (SMP) systems. Observing that a large fraction of snoops do not ...
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure correct and reliable operation of their designs. The possibility of wide fluctuations i...
ASPLOS
2008
ACM
14 years 11 months ago
2008
ACM
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
VLSID
2009
IEEE
15 years 10 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...