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ISQED
2010
IEEE
194views Hardware» more  ISQED 2010»
15 years 8 months ago
Accelerating trace computation in post-silicon debug
— Post-silicon debug comprises a significant and highly variable fraction of the total development time for large chip designs. To accelerate post-silicon debug, BackSpace [1, 2...
Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aam...
CSMR
2005
IEEE
15 years 7 months ago
Applying Webmining Techniques to Execution Traces to Support the Program Comprehension Process
Well-designed object-oriented programs typically consist of a few key classes that work tightly together to provide the bulk of the functionality. As such, these key classes are e...
Andy Zaidman, Toon Calders, Serge Demeyer, Jan Par...
TIME
2005
IEEE
15 years 7 months ago
A Trace Semantics for Positive Core XPath
— We provide a novel trace semantics for positive core XPath that exposes all intermediate nodes visited by the query engine. This enables a detailed analysis of all information ...
Pieter H. Hartel
149
Voted
FCCM
2009
IEEE
106views VLSI» more  FCCM 2009»
15 years 5 months ago
Optimal Placement-aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators
Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, we present a polynomial time al...
Joon Edward Sim, Weng-Fai Wong, Jürgen Teich
ACSC
2006
IEEE
15 years 5 months ago
Tracing secure information flow through mode changes
Communications devices intended for use in securitycritical applications must be rigorously evaluated to ensure they preserve data confidentiality. This process includes tracing t...
Colin J. Fidge, Tim McComb