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VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
16 years 5 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
CODES
2006
IEEE
15 years 11 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
15 years 11 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
MIDDLEWARE
2007
Springer
15 years 11 months ago
A Utility-Aware Middleware Architecture for Decentralized Group Communication Applications
Abstract. The success of Internet telephony services like Skype illustrates the feasibility of utilizing unstructured Peer-to-Peer (P2P) networks as an economical platform for supp...
Jianjun Zhang, Ling Liu, Lakshmish Ramaswamy, Gong...
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
15 years 10 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang