Sciweavers

365 search results - page 6 / 73
» Semi-automatic derivation of timing models for WCET analysis
Sort
View
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 3 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
SEUS
2010
IEEE
14 years 10 months ago
Code Generation for Embedded Java with Ptolemy
Abstract. Code generation from models is the ultimate goal of model-based design. For real-time systems the generated code must be analyzable for the worstcase execution time (WCET...
Martin Schoeberl, Christopher Brooks, Edward A. Le...
RTAS
2008
IEEE
15 years 6 months ago
Hybrid Timing Analysis of Modern Processor Pipelines via Hardware/Software Interactions
Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability...
Sibin Mohan, Frank Mueller
WCET
2010
14 years 9 months ago
Towards WCET Analysis of Multicore Architectures Using UPPAAL
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
Andreas Gustavsson, Andreas Ermedahl, Björn L...
RTCSA
1999
IEEE
15 years 4 months ago
Pipeline Timing Analysis Using a Trace-Driven Simulator
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
Jakob Engblom, Andreas Ermedahl