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ITC
2003
IEEE
168views Hardware» more  ITC 2003»
13 years 11 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...
ITC
1998
IEEE
60views Hardware» more  ITC 1998»
13 years 10 months ago
Semiconductor manufacturing process monitoring using built-in self-test for embedded memories
Ivo Schanstra, Dharmajaya Lukita, A. J. van de Goo...
ITC
2003
IEEE
168views Hardware» more  ITC 2003»
13 years 11 months ago
Agent Based DBIST/DBISR And Its Web/Wireless Management
This paper presents an attempt of using intelligent agents for testing and repairing a distributed system, whose elements may or may not have embedded BIST (Built-In Self-Test) an...
Liviu Miclea, Szilárd Enyedi, Gavril Todere...
DAC
2000
ACM
14 years 7 months ago
Embedded hardware and software self-testing methodologies for processor cores
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, ...
CODES
2010
IEEE
13 years 4 months ago
Statistical approach in a system level methodology to deal with process variation
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
Concepción Sanz Pineda, Manuel Prieto, Jos&...