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VTS
2007
IEEE
143views Hardware» more  VTS 2007»
15 years 9 months ago
RTL Test Point Insertion to Reduce Delay Test Volume
In this paper, a novel test point insertion methodology is presented for RTL designs that aims to reduce the data volume of scan-based transition delay tests. Test points are iden...
Kedarnath J. Balakrishnan, Lei Fang
GLVLSI
2006
IEEE
193views VLSI» more  GLVLSI 2006»
15 years 9 months ago
Optimizing noise-immune nanoscale circuits using principles of Markov random fields
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
ICDE
2005
IEEE
125views Database» more  ICDE 2005»
15 years 8 months ago
QoSMig: Adaptive Rate-Controlled Migration of Bulk Data in Storage Systems
Abstract— Logical reorganization of data and requirements of differentiated QoS in information systems necessitate bulk data migration by the underlying storage layer. Such data ...
Koustuv Dasgupta, Sugata Ghosal, Rohit Jain, Upend...
STEP
2005
IEEE
15 years 8 months ago
Elemental Design Patterns Recognition In Java
The decomposition of design patterns into simpler elements may reduce significantly the creation of variants in forward engineering, while it increases the possibility of identify...
Francesca Arcelli Fontana, Stefano Masiero, Claudi...
WILF
2005
Springer
112views Fuzzy Logic» more  WILF 2005»
15 years 8 months ago
NEC for Gene Expression Analysis
Aim of this work is to apply a novel comprehensive machine learning tool for data mining to preprocessing and interpretation of gene expression data. Furthermore, some visualizatio...
Roberto Amato, Angelo Ciaramella, N. Deniskina, Ca...