Sciweavers

29 search results - page 5 / 6
» Short circuit power consumption of glitches
Sort
View
GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
14 years 1 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
FPL
2005
Springer
115views Hardware» more  FPL 2005»
15 years 3 months ago
Statistical Power Estimation for FPGA
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
Elias Todorovich, Fabian Angarita, Javier Valls, E...
ICCAD
2008
IEEE
122views Hardware» more  ICCAD 2008»
15 years 6 months ago
Network flow-based power optimization under timing constraints in MSV-driven floorplanning
Abstract— Power consumption has become a crucial problem in modern circuit design. Multiple Supply Voltage (MSV) design is introduced to provide higher flexibility in controllin...
Qiang Ma, Evangeline F. Y. Young
DATE
2003
IEEE
65views Hardware» more  DATE 2003»
15 years 2 months ago
Masking the Energy Behavior of DES Encryption
Smart cards are vulnerable to both invasive and non-invasive attacks. Specifically, non-invasive attacks using power and timing measurements to extract the cryptographic key has d...
Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T....
ERSA
2006
70views Hardware» more  ERSA 2006»
14 years 10 months ago
Differential Reconfiguration Architecture suitable for a Holographic Memory
Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much l...
Minoru Watanabe, Mototsugu Miyano, Fuminori Kobaya...