4747 search results - page 45 / 950 » Shuffle Memory System |
100
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ISCA
1996
IEEE
15 years 1 months ago
1996
IEEE
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
111
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TVLSI
2008
14 years 9 months ago
2008
This paper proposes a high-performance scalable quality-of-service (QoS)-aware memory controller for the packet memory where packet data are stored in network routers. A major chal...
FPL
2009
Springer
15 years 1 months ago
2009
Springer
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
WIESS
2000
14 years 11 months ago
2000
A software system can be called a safe-system with respect to memory, when it supports only strong-typing and it does not allow for the manual disposal of dynamic memory [2]. The ...
ISCA
2012
IEEE
13 years 3 days ago
2012
IEEE
Recent improvements in architectural supports for virtualization have extended traditional hardware page walkers to traverse nested page tables. However, current twodimensional (2...