42 search results - page 4 / 9 » Signature Rollback - A Technique for Testing Robust Circuits |
ET
2002
14 years 9 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ICCD
1995
IEEE
15 years 1 months ago
1995
IEEE
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
ASPDAC
2000
ACM
15 years 1 months ago
2000
ACM
Many intellectual property protection (IPP) techniques have been proposed. Their primary objectives are providing convincible proof of authorship with least degradation of the qua...
ICCAD
2010
IEEE
14 years 6 months ago
2010
IEEE
Coarse-grain multi-threshold CMOS (MTCMOS) is an effective power-gating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS power switc...
CIKM
2009
Springer
15 years 4 months ago
2009
Springer
We consider the coverage testing problem where we are given a document and a corpus with a limited query interface and asked to find if the corpus contains a near-duplicate of th...