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HPCA
1998
IEEE
15 years 4 months ago
Speculative Versioning Cache
Dependences among loads and stores whose addresses are unknown hinder the extraction of instruction level parallelism during the execution of a sequential program. Such ambiguous ...
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, G...
CLUSTER
2008
IEEE
15 years 6 months ago
Context-aware address translation for high performance SMP cluster system
—User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface...
Moon-Sang Lee, Joonwon Lee, Seungryoul Maeng
84
Voted
SIGMOD
2000
ACM
98views Database» more  SIGMOD 2000»
15 years 4 months ago
High Speed On-line Backup When Using Logical Log Operations
Media recovery protects a database from failures of the stable medium by maintaining an extra copy of the database, called the backup, and a media recovery log. When a failure occ...
David B. Lomet
ECRTS
2010
IEEE
15 years 26 days ago
Precise and Efficient FIFO-Replacement Analysis Based on Static Phase Detection
Schedulability analysis for hard real-time systems requires bounds on the execution times of its tasks. To obtain useful bounds in the presence of caches, static timing analyses mu...
Daniel Grund, Jan Reineke
MICRO
2006
IEEE
113views Hardware» more  MICRO 2006»
14 years 11 months ago
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
Jack Sampson, Rubén González, Jean-F...