1304 search results - page 101 / 261 » Simulation of Soliton Circuits |
106
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CHARME
1995
Springer
15 years 1 months ago
1995
Springer
In this paper we present a method formodeling asynchronous digital circuits by timed automata. The constructed timed automata serve as \mechanical" and veri able objects for a...
134
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3DIC
2009
IEEE
15 years 5 months ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
105
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NANONET
2009
Springer
15 years 4 months ago
2009
Springer
The Suspended Gate Field Effect Transistor (SG-FET) appears to have the potential to replace traditional FETs in sleep mode circuits, due to its abrupt switching enabled by electro...
DFT
2008
IEEE
15 years 4 months ago
2008
IEEE
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
ISQED
2005
IEEE
15 years 3 months ago
2005
IEEE
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...