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DFT
2002
IEEE
121views VLSI» more  DFT 2002»
15 years 2 months ago
Testing Digital Circuits with Constraints
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...
Ahmad A. Al-Yamani, Subhasish Mitra, Edward J. McC...
CDC
2009
IEEE
124views Control Systems» more  CDC 2009»
15 years 2 months ago
Design of insulating devices for in vitro synthetic circuits
— This paper describes a synthetic in vitro genetic circuit programmed to work as an insulating device. This circuit is composed of nucleic acids, which can be designed to intera...
Elisa Franco, Domitilla Del Vecchio, Richard M. Mu...
ICCAD
2000
IEEE
72views Hardware» more  ICCAD 2000»
15 years 2 months ago
Synthesis of CMOS Domino Circuits for Charge Sharing Alleviation
The Charge Sharing (CS) problem is one of notorious noise problems in domino circuits design and test. In this paper, this problem is thoroughly investigated by considering circui...
Ching-Hwa Cheng, Shih-Chieh Chang, Shin-De Li, Wen...
ASYNC
1997
IEEE
123views Hardware» more  ASYNC 1997»
15 years 2 months ago
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
DAC
1995
ACM
15 years 1 months ago
Power Estimation in Sequential Circuits
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
Farid N. Najm, Shashank Goel, Ibrahim N. Hajj