Sciweavers

1304 search results - page 80 / 261
» Simulation of Soliton Circuits
Sort
View
DFT
2008
IEEE
82views VLSI» more  DFT 2008»
15 years 4 months ago
Selective Hardening of NanoPLA Circuits
Nanoelectronic components are expected to suffer from very high error rates, implying the need for hardening techniques. We propose a fine-grained approach to harden a promising...
Ilia Polian, Wenjing Rao
ASAP
2006
IEEE
109views Hardware» more  ASAP 2006»
15 years 4 months ago
Describing Quantum Circuits with Systolic Arrays
In the simulation of quantum circuits the matrices and vectors used to represent unitary operations and qubit states grow exponentially as the number of qubits increase. For insta...
Aasavari Bhave, Eurípides Montagne, Edgar G...
VLSID
2000
IEEE
95views VLSI» more  VLSID 2000»
15 years 2 months ago
Hierarchical Error Diagnosis Targeting RTL Circuits
Diagnosis algorithms targeting design errors in RTL circuit descriptions are presented in this paper. The algorithms presented exploit the hierarchy available in RTL designs to lo...
Vamsi Boppana, Indradeep Ghosh, Rajarshi Mukherjee...
ASPDAC
2004
ACM
85views Hardware» more  ASPDAC 2004»
15 years 1 months ago
Multi-level placement with circuit schema based clustering in analog IC layouts
This paper aims at developing an automated device-level placement for analog circuit design which achieves comparable quality to manual designs by experts. It extracts a set of cl...
Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Sh...
DAC
2010
ACM
14 years 10 months ago
Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression
In this paper, we propose a novel multi-mode/multi-corner sparse regression (MSR) algorithm to build large-scale performance models of integrated circuits at multiple working mode...
Wangyang Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xi...