1304 search results - page 97 / 261 » Simulation of Soliton Circuits |
101
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ASPDAC
2010
ACM
14 years 8 months ago
2010
ACM
In this paper, we present a new voltage IR drop analysis approach for large on-chip power delivery networks. The new approach is based on recently proposed sampling based reductio...
67
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DAC
2002
ACM
15 years 11 months ago
2002
ACM
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
ASIAMS
2008
IEEE
15 years 4 months ago
2008
IEEE
A carry-select adder(CSA) can be implemented by using single ripple carry adder and an add-one circuit instead of using dual ripple-carry adders to reduce the area and power but w...
78
Voted
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
— This paper presents ATLAS - a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arrang...
90
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SBCCI
2005
ACM
15 years 3 months ago
2005
ACM
In this work the design of radiofrequency CMOS circuit blocks in the 910MHz ISM band, while biasing the MOS transistor in the moderate inversion region, is analyzed. An amplifier ...