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» Simultaneous SAT-Based Model Checking of Safety Properties
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EUROMICRO
2000
IEEE
15 years 2 months ago
Concurrent Control Systems: From Grafcet to VHDL
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
Frédéric Mallet, Daniel Gaffé...
DAC
2004
ACM
15 years 10 months ago
A SAT-based algorithm for reparameterization in symbolic simulation
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
Pankaj Chauhan, Edmund M. Clarke, Daniel Kroening
114
Voted
ISCA
2012
IEEE
232views Hardware» more  ISCA 2012»
13 years 13 hour ago
RADISH: Always-on sound and complete race detection in software and hardware
Data-race freedom is a valuable safety property for multithreaded programs that helps with catching bugs, simplifying memory consistency model semantics, and verifying and enforci...
Joseph Devietti, Benjamin P. Wood, Karin Strauss, ...
FORMATS
2004
Springer
15 years 3 months ago
Lazy Approximation for Dense Real-Time Systems
We propose an effective and complete method for verifying safety and properties of timed systems, which is based on predicate abstraction for g finite abstractions of timed autom...
Maria Sorea
145
Voted
B
2007
Springer
15 years 1 months ago
Automatic Translation from Combined B and CSP Specification to Java Programs
Abstract. A recent contribution to the formal specification and verification of concurrent systems is the integration of the state- and event-based approaches B and CSP, specifical...
Letu Yang, Michael Poppleton