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ISCAPDCS
2001
13 years 7 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
WORDS
2003
IEEE
13 years 11 months ago
Scalable Online Feasibility Tests for Admission Control in a Java Real-Time System
In the Komodo project a real-time Java system based on a multithreaded Java microcontroller has been developed. A main scheduling policy realized by hardware in the microcontroller...
Uwe Brinkschulte
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
13 years 11 months ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
CASES
2005
ACM
13 years 8 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
ISCA
1992
IEEE
151views Hardware» more  ISCA 1992»
13 years 10 months ago
An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yos...