49 search results - page 7 / 10 » Soft error derating computation in sequential circuits |
DSN
2005
IEEE
15 years 5 months ago
2005
IEEE
1 In sub-micron technology circuits high integration levels coupled with the increased sensitivity to soft errors even at ground level make the task of guaranteeing systems’ depe...
114
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TC
2011
14 years 6 months ago
2011
—Mounting concerns over variability, defects and noise motivate a new approach for digital circuitry: stochastic logic, that is to say, logic that operates on probabilistic signa...
109
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ISQED
2008
IEEE
15 years 6 months ago
2008
IEEE
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
115
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MICRO
2006
IEEE
14 years 11 months ago
2006
IEEE
Shrinking devices to the nanoscale, increasing integration densities, and reducing of voltage levels down to the thermal limit, all conspire to produce faulty systems. Frequent oc...
116
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DAC
2008
ACM
16 years 18 days ago
2008
ACM
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...