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102
Voted
CODES
2008
IEEE
15 years 7 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
106
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CODES
2007
IEEE
15 years 7 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
105
Voted
CODES
2007
IEEE
15 years 7 months ago
2007
IEEE
Performance analysis of microprocessors is a critical step in defining the microarchitecture, prior to register-transfer-level (RTL) design. In complex chip multiprocessor systems...
115
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CODES
2007
IEEE
15 years 7 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
101
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EMSOFT
2007
Springer
15 years 6 months ago
2007
Springer
Flash memory has many merits such as light weight, shock resistance, and low power consumption, but also has limitations like the erase-before-write property. To overcome such lim...