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ET
2002
85views more  ET 2002»
14 years 9 months ago
Signal Integrity: Fault Modeling and Testing in High-Speed SoCs
As we approach 100nm technology the interconnect issues are becoming one of the main concerns in the testing of gigahertz system-onchips. Voltage distortion (noise) and delay viol...
Mehrdad Nourani, Amir Attarha
DAC
2006
ACM
15 years 10 months ago
GreenBus: a generic interconnect fabric for transaction level modelling
In this paper we present a generic interconnect fabric for transaction level modelling tackeling three major aspects. First, a review of the bus and IO structures that we have ana...
Wolfgang Klingauf, Robert Günzel, Oliver Brin...
ISQED
2007
IEEE
151views Hardware» more  ISQED 2007»
15 years 3 months ago
Wavelet-Based Passivity Preserving Model Order Reduction for Wideband Interconnect Characterization
Model order reduction plays a key role in determining VLSI system performance and the optimization of interconnects. In this paper, we develop an accurate and provably passive met...
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
ICCAD
2004
IEEE
147views Hardware» more  ICCAD 2004»
15 years 6 months ago
Interval-valued reduced order statistical interconnect modeling
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
James D. Ma, Rob A. Rutenbar
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation
In the paper, we develop a systematic methodology for modeling sampled interconnect frequency response data based on spline interpolation. Through piecewise polynomial interpolatio...
Arthur Nieuwoudt, Mehboob Alam, Yehia Massoud