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SLIP
2005
ACM
15 years 7 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
IPPS
2007
IEEE
15 years 8 months ago
Performance Modelling of Necklace Hypercubes
The necklace hypercube has recently been introduced as an attractive alternative to the well-known hypercube. Previous research on this network topology has mainly focused on topo...
Sina Meraji, Hamid Sarbazi-Azad, Ahmad Patooghy
VLSID
2005
IEEE
100views VLSI» more  VLSID 2005»
16 years 2 months ago
A Fast Buffered Routing Tree Construction Algorithm under Accurate Delay Model
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
Yibo Wang, Yici Cai, Xianlong Hong
SLIP
2003
ACM
15 years 7 months ago
Fast estimation of the partitioning rent characteristic using a recursive partitioning model
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...
Joni Dambre, Dirk Stroobandt, Jan Van Campenhout
ASWSD
2004
Springer
15 years 7 months ago
Automotive Software: A Challenge and Opportunity for Model-Based Software Development
Embedded software development for automotive applications is widely considered as a significant source of innovation and improvements in cars. However, software development proces...
Gabor Karsai