Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
is the level of abstraction: a logical model ignores the constraints that the underlying database technology imposes and presents a simplified view. Sometimes physical database des...
While a typical software component has a clearly specified (static) interface in terms of the methods and the input/output types they support, information about the correct sequen...
Abstract. We present automated techniques for the explanation of counterexamples, where a counter-example should be understood as a sequence of program statements. Our approach is ...
Hierarchical Message Sequence Charts are a well-established formalism to specify telecommunication protocols. In this model, numerous undecidability results were obtained recently ...