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166
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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
13 years 6 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
HIPS
1998
IEEE
15 years 8 months ago
Parallel and Distributed Programming with Pthreads and Rthreads
This paper describes Rthreads (Remote threads), a software distributed shared memory system that supports sharing of global variables on clusters of computers with physically dist...
Bernd Dreier, Markus Zahn, Theo Ungerer
136
Voted
MOBISYS
2004
ACM
16 years 3 months ago
Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet
ZebraNet is a mobile, wireless sensor network in which nodes move throughout an environment working to gather and process information about their surroundings [10]. As in many sen...
Ting Liu, Christopher M. Sadler, Pei Zhang, Margar...
184
Voted
HPCA
2002
IEEE
16 years 4 months ago
Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach
Power dissipation has become one of the most critical factors for the continued development of both high-end and low-end computer systems. The successful design and evaluation of ...
Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary J...
161
Voted
EMSOFT
2010
Springer
15 years 1 months ago
A unifying view of loosely time-triggered architectures
Abstract--Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz' Time-Triggered Architectures (TTA) have been proposed ...
Albert Benveniste, Anne Bouillard, Paul Caspi