354 search results - page 21 / 71 » Sorting networks on FPGAs |
103
Voted
SLIP
2005
ACM
15 years 3 months ago
2005
ACM
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
SPAA
2009
ACM
15 years 7 months ago
2009
ACM
A K-smoothing network is a distributed, low-contention data structure where tokens arrive arbitrarily on w input wires and reach w output wires via their completely asynchronous p...
FPL
2005
Springer
15 years 3 months ago
2005
Springer
Future process nodes have such small feature sizes that there will be an increase in the number of manufacturing defects per die. For large FPGAs, it will be critical to tolerate ...
87
Voted
FPL
2005
Springer
15 years 3 months ago
2005
Springer
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
79
Voted
FPGA
2003
ACM
15 years 3 months ago
2003
ACM
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...