Sciweavers

104 search results - page 14 / 21
» Specify, Compile, Run: Hardware from PSL
Sort
View
88
Voted
POPL
2000
ACM
15 years 1 months ago
Resource Bound Certification
Various code certification systems allow the certification and static verification of important safety properties such as memory and control-flow safety. These systems are valuabl...
Karl Crary, Stephanie Weirich
ISCA
2003
IEEE
183views Hardware» more  ISCA 2003»
15 years 2 months ago
The Jrpm System for Dynamically Parallelizing Java Programs
We describe the Java runtime parallelizing machine (Jrpm), a complete system for parallelizing sequential programs automatically. Jrpm is based on a chip multiprocessor (CMP) with...
Michael K. Chen, Kunle Olukotun
DSD
2008
IEEE
165views Hardware» more  DSD 2008»
15 years 3 months ago
Application Analysis for Parallel Processing
Effective mapping of multimedia applications on massively parallel embedded systems is a challenging demand in the domain of compiler design. The software implementations of emerg...
Muhammad Rashid, Damien Picard, Bernard Pottier
ASPLOS
2011
ACM
14 years 1 months ago
Mementos: system support for long-running computation on RFID-scale devices
Transiently powered computing devices such as RFID tags, kinetic energy harvesters, and smart cards typically rely on programs that complete a task under tight time constraints be...
Benjamin Ransford, Jacob Sorber, Kevin Fu
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
14 years 11 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt