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DFT
2006
IEEE
130views VLSI» more  DFT 2006»
15 years 5 months ago
Off-Chip Control Flow Checking of On-Chip Processor-Cache Instruction Stream
Control flow checking (CFC) is a well known concurrent checking technique for ensuring that a program’s instruction execution sequence follows permissible paths. Almost all CFC...
Federico Rota, Shantanu Dutt, Sahithi Krishna
GLVLSI
2006
IEEE
152views VLSI» more  GLVLSI 2006»
15 years 5 months ago
2 Gbps SerDes design based on IBM Cu-11 (130nm) standard cell technology
This paper introduces a standard cell based design for a Serializer and Deserializer (SerDes) communication link. The proposed design is area, power and design time efficient as c...
Rashed Zafar Bhatti, Monty Denneau, Jeff Draper
ICRA
2006
IEEE
123views Robotics» more  ICRA 2006»
15 years 5 months ago
Simultaneous Localization and Mapping with Environmental Structure Prediction
—Traditionally, simultaneous localization and mapping (SLAM) algorithms solve the localization and mapping problem in explored regions. This paper presents a prediction-based SLA...
H. Jacky Chang, C. S. George Lee, Yung-Hsiang Lu, ...
ICRA
2006
IEEE
110views Robotics» more  ICRA 2006»
15 years 5 months ago
Speeding-up Rao-blackwellized SLAM
— Recently, Rao-Blackwellized particle filters have become a popular tool to solve the simultaneous localization and mapping problem. This technique applies a particle filter i...
Giorgio Grisetti, Gian Diego Tipaldi, Cyrill Stach...
IPPS
2006
IEEE
15 years 5 months ago
GPU-ABiSort: optimal parallel sorting on stream architectures
In this paper, we present a novel approach for parallel sorting on stream processing architectures. It is based on adaptive bitonic sorting. For sorting n values utilizing p strea...
Alexander Greß, Gabriel Zachmann