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ASPLOS
2010
ACM
15 years 3 months ago
Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems
Cores in a chip-multiprocessor (CMP) system share multiple hardware resources in the memory subsystem. If resource sharing is unfair, some applications can be delayed significantl...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
IEEEPACT
2006
IEEE
15 years 5 months ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
EH
2000
IEEE
81views Hardware» more  EH 2000»
15 years 4 months ago
Toward Self-Repairing and Self-Replicating Hardware: The Embryonics Approach
The growth and operation of all living beings are directed by the interpretation, in each of their cells, of a chemical program, the DNA string or genome. This process is the sour...
Daniel Mange, Moshe Sipper, André Stauffer,...
POPL
2010
ACM
15 years 9 months ago
Dynamically Checking Ownership Policies in Concurrent C/C++ Programs
Concurrent programming errors arise when threads share data incorrectly. Programmers often avoid these errors by using synchronization to enforce a simple ownership policy: data i...
Jean-Phillipe Martin, Michael Hicks, Manuel Costa,...
SIGMETRICS
2003
ACM
199views Hardware» more  SIGMETRICS 2003»
15 years 5 months ago
Data cache locking for higher program predictability
Caches have become increasingly important with the widening gap between main memory and processor speeds. However, they are a source of unpredictability due to their characteristi...
Xavier Vera, Björn Lisper, Jingling Xue