Timed automata provide useful state machine based representations for the validation and verification of realtime control systems. This paper introduces an algorithmic methodolog...
Abstract— We show how to compute a minimal Riccatibalanced state map and a minimal Riccati-balanced state space representation starting from an image representation of a strictly...
We address the problem of obtaining good variable orderings for the BDD representation of a system of interacting finite state machines (FSMs). Orderings are derived from the comm...
Model checkers were originally developed to support the formal verification of high-level design models of distributed system designs. Over the years, they have become unmatched in...
We present various techniques for improving the time and space efficiency of symbolic model checking for system requirements specified as synchronous finite state machines. We use...
William Chan, Richard J. Anderson, Paul Beame, Dav...