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» State machine models of timing and circuit design
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DAC
2006
ACM
15 years 3 months ago
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
Rakesh Vattikonda, Wenping Wang, Yu Cao
DATE
1999
IEEE
129views Hardware» more  DATE 1999»
15 years 2 months ago
Battery-Powered Digital CMOS Design
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
Massoud Pedram, Qing Wu
EH
2004
IEEE
102views Hardware» more  EH 2004»
15 years 1 months ago
Design Space Issues for Intrinsic Evolvable Hardware
This paper discusses the problem of increased programming time for intrinsic evolvable hardware (EHW) as the complexity of the circuit grows. We develop equations for the size of ...
James Hereford, David A. Gwaltney
BIRTHDAY
2010
Springer
15 years 2 months ago
The Arrow of Time through the Lens of Computing
Egon Börger Ambient Abstract State Machines with Applications 11:00 AM Manfred Broy Realizability of System Interface Specifications 11:30 AM Ofer Strichman Proving Equivalence be...
Krishna V. Palem
EUROCRYPT
2010
Springer
15 years 2 months ago
Protecting Circuits from Leakage: the Computationally-Bounded and Noisy Cases
Abstract. Physical computational devices leak side-channel information that may, and often does, reveal secret internal states. We present a general transformation that compiles an...
Sebastian Faust, Tal Rabin, Leonid Reyzin, Eran Tr...