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DFT
2003
IEEE
83views VLSI» more  DFT 2003»
15 years 10 months ago
Yield Modeling and Analysis of a Clockless Asynchronous Wave Pipeline with Pulse Faults
This paper proposes a new fault model and its modeling and analysis methods in a clockless asynchronous wave pipeline for extensive yield evaluation and assurance. It is highly de...
T. Feng, Nohpill Park, Yong-Bin Kim, Vincenzo Piur...
IOLTS
2006
IEEE
81views Hardware» more  IOLTS 2006»
15 years 11 months ago
Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers
This work intends to evaluate the effect of a Single Event Upsets (SEUs) and crosstalk faults in a NoC router architecture by developing a fault injection mechanism, allowing an a...
Arthur Pereira Frantz, Luigi Carro, Érika F...
FDTC
2008
Springer
160views Cryptology» more  FDTC 2008»
15 years 6 months ago
Error Detection for Borrow-Save Adders Dedicated to ECC Unit
Differential Fault Analysis (DFA) is a real threat for elliptic curve cryptosystems. This paper describes an elliptic curve cryptoprocessor unit resistant against fault injection....
Julien Francq, Jean-Baptiste Rigaud, Pascal Manet,...
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
16 years 2 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
MICRO
2005
IEEE
145views Hardware» more  MICRO 2005»
15 years 10 months ago
A Mechanism for Online Diagnosis of Hard Faults in Microprocessors
We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-field faults, by leveraging existing microprocessor redundancy. To do this, we...
Fred A. Bower, Daniel J. Sorin, Sule Ozev