Sciweavers

1459 search results - page 136 / 292
» Statistical Modeling for Circuit Simulation
Sort
View
DAC
2006
ACM
16 years 4 months ago
Power-centric design of high-speed I/Os
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 8 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
PADS
2003
ACM
15 years 8 months ago
Parallel Network Simulation under Distributed Genesis
We describe two major developments in the General Network Simulation Integration System (Genesis): the support for BGP protocol in large network simulations and distribution of th...
Boleslaw K. Szymanski, Yu Liu, Rashim Gupta
DAC
2003
ACM
15 years 8 months ago
NORM: compact model order reduction of weakly nonlinear systems
This paper presents a compact Nonlinear model Order Reduction Method (NORM) that is applicable for time-invariant and time-varying weakly nonlinear systems. NORM is suitable for r...
Peng Li, Lawrence T. Pileggi
ISQED
2007
IEEE
125views Hardware» more  ISQED 2007»
15 years 9 months ago
Modeling of PMOS NBTI Effect Considering Temperature Variation
Negative bias temperature instability (NBTI) has come to the forefront of critical reliability phenomena in advanced CMOS technology. In this paper, we propose a fast and accurate...
Hong Luo, Yu Wang 0002, Ku He, Rong Luo, Huazhong ...