291 search results - page 2 / 59 » Statistical Power Estimation for FPGA |
SLIP
2009
ACM
15 years 4 months ago
2009
ACM
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
67
Voted
ICASSP
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper presents accurate area and power estimation models for implementations using FPGAs from the Xilinx Virtex-2Pro family. These models are designed to facilitate efficien...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
179
Voted
VLSI
2012
Springer
13 years 5 months ago
2012
Springer
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...