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ICCAD
2001
IEEE
128views Hardware» more  ICCAD 2001»
15 years 8 months ago
An Assembly-Level Execution-Time Model for Pipelined Architectures
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
55
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ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 6 months ago
Circuit-level mismatch modelling and yield optimization for CMOS analog circuits
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
Mingjing Chen, Alex Orailoglu
UM
2005
Springer
15 years 5 months ago
Task-Oriented Web User Modeling for Recommendation
Abstract. We propose an approach for modeling the navigational behavior of Web users based on task-level patterns. The discovered “tasks” are characterized probabilistically as...
Xin Jin, Yanzan Zhou, Bamshad Mobasher
HPDC
2007
IEEE
15 years 6 months ago
A statistical approach to risk mitigation in computational markets
We study stochastic models to mitigate the risk of poor Quality-of-Service (QoS) in computational markets. Consumers who purchase services expect both price and performance guaran...
Thomas Sandholm, Kevin Lai
IJCV
1998
233views more  IJCV 1998»
14 years 11 months ago
A Level-Set Approach to 3D Reconstruction from Range Data
This paper presents a method that uses the level sets of volumes to reconstruct the shapes of 3D objects from range data. The strategy is to formulate 3D reconstruction as a stati...
Ross T. Whitaker