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98
Voted
VLSID
2002
IEEE
15 years 3 months ago
2002
IEEE
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
83
Voted
DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
The widening gap between processor and memory speeds renders data locality optimization a very important issue in data-intensive embedded applications. Throughout the years hardwa...
103
click to vote
ICMCS
2005
IEEE
15 years 3 months ago
2005
IEEE
A particular application of audio data hiding systems and watermarking systems consists of using the audio signal as a transmission channel for binary information. The system shou...