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CASES
2003
ACM
15 years 2 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
DAC
1997
ACM
15 years 1 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
DAC
2009
ACM
15 years 10 months ago
Mode grouping for more effective generalized scheduling of dynamic dataflow applications
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...
William Plishker, Nimish Sane, Shuvra S. Bhattacha...
EMSOFT
2009
Springer
15 years 4 months ago
NANDFS: a flexible flash file system for RAM-constrained systems
NANDFS is a flash file system that exposes a memory-performance tradeoff to system integrators. The file system can be configured to use a large amount of RAM, in which case i...
Aviad Zuck, Ohad Barzilay, Sivan Toledo
PACS
2000
Springer
110views Hardware» more  PACS 2000»
15 years 1 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao