697 search results - page 17 / 140 » Strategies to Parallelize ILP Systems |
83
Voted
IPPS
1997
IEEE
15 years 4 months ago
1997
IEEE
Abstract — Processor scheduling has received considerable attention in the context of shared-memory multiprocessor systems but has not received as much attention in distributed-m...
116
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RTAS
2008
IEEE
15 years 6 months ago
2008
IEEE
Instruction scratchpads have been previously suggested as a way to reduce the worst case execution time (WCET) of hard real-time programs without introducing the analysis issues p...
135
Voted
MICRO
1997
IEEE
15 years 4 months ago
1997
IEEE
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
DAC
2002
ACM
16 years 1 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
80
Voted
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
As computing breaches petascale limits both in processor performance and storage capacity, the only way that current and future gains in performance can be achieved is by increasi...