Sciweavers

585 search results - page 99 / 117
» Strategy Logic
Sort
View
104
Voted
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
15 years 6 months ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
ESWS
2010
Springer
15 years 6 months ago
Replication and Versioning of Partial RDF Graphs
The sizes of datasets available as RDF (e.g., as part of the Linked Data cloud) are increasing continuously. For instance, the recent DBpedia version consists of nearly 500 million...
Bernhard Schandl
111
Voted
PPDP
2009
Springer
15 years 6 months ago
Context-based proofs of termination for typed delimited-control operators
We present direct proofs of termination of evaluation for typed delimited-control operators shift and reset using a variant of Tait’s method with context-based reducibility pred...
Malgorzata Biernacka, Dariusz Biernacki
124
Voted
SARA
2009
Springer
15 years 6 months ago
Rewriting Constraint Models with Metamodels
An important challenge in constraint programming is to rewrite constraint models into executable programs calculating the solutions. This phase of constraint processing may requir...
Raphaël Chenouard, Laurent Granvilliers, Rica...
DFT
1999
IEEE
114views VLSI» more  DFT 1999»
15 years 6 months ago
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM
A programmable single-chip multiprocessor system for video coding has been developed. The system is implemented in a high-performance 0.25 m logic/embedded DRAM process. It integr...
Markus Rudack, Dirk Niggemeyer