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129
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IEEEPACT
2000
IEEE
15 years 8 months ago
Exploring the Limits of Sub-Word Level Parallelism
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
Kevin Scott, Jack W. Davidson
ICPP
1999
IEEE
15 years 8 months ago
Compiler Optimizations for I/O-Intensive Computations
This paper describes transformation techniques for out-of-core programs (i.e., those that deal with very large quantities of data) based on exploiting locality using a combination...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
JILP
2000
90views more  JILP 2000»
15 years 3 months ago
Speculative Updates of Local and Global Branch History: A Quantitative Analysis
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottlen...
Kevin Skadron, Margaret Martonosi, Douglas W. Clar...
127
Voted
FPL
2010
Springer
134views Hardware» more  FPL 2010»
15 years 1 months ago
GPU Versus FPGA for High Productivity Computing
Heterogeneous or co-processor architectures are becoming an important component of high productivity computing systems (HPCS). In this work the performance of a GPU based HPCS is c...
David Huw Jones, Adam Powell, Christos-Savvas Boug...
185
Voted
ISCA
2012
IEEE
224views Hardware» more  ISCA 2012»
13 years 6 months ago
A first-order mechanistic model for architectural vulnerability factor
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy...