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CODES
2007
IEEE
15 years 10 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
CODES
2007
IEEE
15 years 10 months ago
Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems
We propose a method for dynamic security domain scaling on SMPs that offers both highly scalable performance and high security for future high-end embedded systems. Its most impor...
Hiroaki Inoue, Akihisa Ikeno, Tsuyoshi Abe, Junji ...
136
Voted
CODES
2007
IEEE
15 years 10 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
Mark Thompson, Hristo Nikolov, Todor Stefanov, And...
157
Voted
GLVLSI
2007
IEEE
328views VLSI» more  GLVLSI 2007»
15 years 10 months ago
New timing and routability driven placement algorithms for FPGA synthesis
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong H...
ICCV
2007
IEEE
15 years 10 months ago
Scale-Invariant Features on the Sphere
This paper considers an application of scale-invariant feature detection using scale-space analysis suitable for use with wide field of view cameras. Rather than obtain scalespac...
Peter Hansen, Peter Corke, Wageeh Boles, Kostas Da...