Sciweavers

210 search results - page 30 / 42
» Switch Architectures For Small-buffered Optical Packet Switc...
Sort
View
JHSN
2007
105views more  JHSN 2007»
14 years 11 months ago
A priority-aware CSMA/CP MAC protocol for the all-optical IP-over-WDM metropolitan area ring network
Abstract. The paper proposes a priority-aware MAC (Medium Access Control) protocol for a core metropolitan area network in the next generation Internet, which is an OPS (Optical Pa...
Jih-Hsin Ho, Wen-Shyang Hwang, Ce-Kuen Shieh
ANCS
2006
ACM
15 years 5 months ago
A practical fast parallel routing architecture for Clos networks
Clos networks are an important class of switching networks due to their modular structure and much lower cost compared with crossbars. For routing I/O permutations of Clos network...
Si-Qing Zheng, Ashwin Gumaste, Enyue Lu
ISCA
1995
IEEE
118views Hardware» more  ISCA 1995»
15 years 3 months ago
The EM-X Parallel Computer: Architecture and Basic Performance
Latency tolerance is essential in achieving high performance on parallel computers for remote function calls and fine-grained remote memory accesses. EM-X supports interprocessor ...
Yuetsu Kodama, Hirohumi Sakane, Mitsuhisa Sato, Ha...
IPPS
2006
IEEE
15 years 5 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
ANCS
2008
ACM
15 years 1 months ago
Low power architecture for high speed packet classification
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu