199 search results - page 26 / 40 » Switching Activity Minimization in Combinational Logic Desig... |
ISCAS
2005
IEEE
15 years 5 months ago
2005
IEEE
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...
104
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MICRO
2006
IEEE
15 years 5 months ago
2006
IEEE
Power delivery is a growing reliability concern in microprocessors as the industry moves toward feature-rich, powerhungrier designs. To battle the ever-aggravating power consumpti...
91
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DAC
2006
ACM
16 years 19 days ago
2006
ACM
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
97
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VISUALIZATION
1999
IEEE
15 years 4 months ago
1999
IEEE
Recent interest in large displays has led to renewed development of tiled displays, which are comprised of several individual displays arranged in an array and used as one large l...