150 search results - page 21 / 30 » Symbolic Model Checking for Simply-Timed Systems |
FMICS
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
CAV
2010
Springer
15 years 1 months ago
2010
Springer
Abstract. We present the tool MERIT, a CEGAR model-checker for safety propf counter-systems, which sits in the Lazy Abstraction with Interpolants (LAWI) framework. LAWI is parametr...
DSD
2004
IEEE
15 years 1 months ago
2004
IEEE
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
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ARTS
1997
Springer
15 years 1 months ago
1997
Springer
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
111
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AMOST
2007
ACM
15 years 1 months ago
2007
ACM
We have devised a novel technique to automatically generate test cases for a software system, combining black-box model-based testing with white-box parameterized unit testing. Th...