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» Synchronization Transformations for Parallel Computing
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112
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ICCS
2007
Springer
15 years 8 months ago
A Combined Hardware/Software Optimization Framework for Signal Representation and Recognition
This paper describes a signal recognition system that is jointly optimized from mathematical representation, algorithm design and final implementation. The goal is to exploit sign...
Melina Demertzi, Pedro C. Diniz, Mary W. Hall, Ann...
HPCC
2007
Springer
15 years 8 months ago
Throttling I/O Streams to Accelerate File-IO Performance
To increase the scale and performance of scientific applications, scientists commonly distribute computation over multiple processors. Often without realizing it, file I/O is pa...
Seetharami R. Seelam, Andre Kerstens, Patricia J. ...
IPPS
2007
IEEE
15 years 8 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
138
Voted
IPPS
2002
IEEE
15 years 7 months ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
IEEEPACT
1998
IEEE
15 years 6 months ago
Scanning Polyhedra without Do-loops
We study in this paper the problem of polyhedron scanning which appears for example when generating code for transformed loop nests in automatic parallelization. After a review of...
Pierre Boulet, Paul Feautrier