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ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
15 years 10 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh
IUI
2005
ACM
15 years 10 months ago
Animating an interactive conversational character for an educational game system
Within the framework of the project NICE (Natural Interactive Communication for Edutainment) [2], we have been developing an educational and entertaining computer game that allows...
Andrea Corradini, Manish Mehta, Niels Ole Bernsen,...
AIIA
2005
Springer
15 years 10 months ago
Automata Slicing for Diagnosing Discrete-Event Systems with Partially Ordered Observations
Abstract. When dealing with real systems, it is unrealistic to suppose that observations can be totally ordered according to their emission dates. The partially ordered observation...
Alban Grastien, Marie-Odile Cordier, Christine Lar...
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IPPS
2003
IEEE
15 years 10 months ago
ECO: An Empirical-Based Compilation and Optimization System
In this paper, we describe a compilation system that automates much of the process of performance tuning that is currently done manually by application programmers interested in h...
Nastaran Baradaran, Jacqueline Chame, Chun Chen, P...
PARELEC
2002
IEEE
15 years 9 months ago
Real-Time Scheduling in Distributed Systems
In this paper, we investigate the worst case performance of Earliest Due Date algorithm when applied to packet scheduling in distributed systems. We assume that the processing ele...
Nguyen Duc Thai