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ASYNC
2005
IEEE
142views Hardware» more  ASYNC 2005»
15 years 5 months ago
An Asynchronous Router for Multiple Service Levels Networks on Chip
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...
Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Ey...
ASPDAC
2004
ACM
75views Hardware» more  ASPDAC 2004»
15 years 5 months ago
A thread partitioning algorithm in low power high-level synthesis
This paper proposes a thread partitioning algorithm in low power high-level synthesis. The algorithm is applied to high-level synthesis systems. In the systems, we can describe pa...
Jumpei Uchida, Nozomu Togawa, Masao Yanagisawa, Ta...
NETGAMES
2003
ACM
15 years 5 months ago
A fair message exchange framework for distributed multi-player games
—This paper presents a framework for message delivery in real-time multi-player distributed interactive games that use the client-server model. Based on this framework, we propos...
Katherine Guo, Sarit Mukherjee, Sampath Rangarajan...
DATE
2010
IEEE
141views Hardware» more  DATE 2010»
15 years 5 months ago
Loosely Time-Triggered Architectures for Cyber-Physical Systems
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...
Albert Benveniste
ICCD
1997
IEEE
90views Hardware» more  ICCD 1997»
15 years 3 months ago
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Ta...